SST WaferNews

Top stories

Elpida begins reorganization with bankruptcy filings
Elpida Memory resolved to file a petition for the commencement of corporate reorganization proceedings, and filed the same with the Tokyo District Court. Analysts around the DRAM industry weigh the impact.
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Semiconductor makers ready for H2 2012 snapback
FBR Capital released its Q4 2011 semiconductor industry analysis, saying corrective actions in the supply chain have set up a possible H2 2012 snapback for semiconductors.
-Semiconductor inventory correction occurred, shows Gartner lead time analysis
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North American chip fab tool makers see 4th month of growth
North America-based manufacturers of semiconductor equipment posted USD1.18b in orders, USD1.24b in billings, and a book-to-bill of 0.95 in January 2012, says SEMI.
-AMAT results point to renewed semi capex
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Take the semiconductor industry expectations survey
WWK opened its 2012 semiconductor industry survey on equipment and process timing. Only participants will receive the full results, free of charge.
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More Headlines:
• 49 wafer fabs close 2009-2011
• Combo chipsets to suffer against embedded WiFi chipsets

Conference reports

ISS Europe: Bridging the valley of death
A common theme among the presenters at SEMI's ISS Europe was how Europe might bridge the so-called “valley of death” between basic research and volume manufacturing.
-450mm wafers at SEMI ISS Europe
-Europeans collaborate on organic and large-area elec
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SPIE Advanced Lithography: The Spring of EUVL
Dr. Vivek Bakshi, EUV Litho, reports on the SPIE Advanced Lithography conference. He says that this year even the loudest criticism of EUVL was not about "if" but "when."
-SPIE Advanced Lithography: Intel's, TSMC's tool roadmap takeaways
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Insights from Japan's IEEE 3DIC Conference
Blogger Dr. Phil Garrou reviews what IFTLE considers some of the more important presentations and posters from the IEEE 3DIC Conference.
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SEMICON China: Challenges and opportunities
SEMICON China takes place March 20-22 in Shanghai. Check out the special pavilions and events, and keynote speakers scheduled.
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More Headlines:
• IBM, ARM, more to keynote Common Platform Technology Forum
• Smart electronics subject of Renesas ConFab keynote
• ISSCC: 2.5D packaging for IVRs, smallest NAND flash...
• Present at the Flash Memory Summit
• IRPS set for April in Anaheim

Fab tool updates
SUSS brings GenISys litho sim onto mask aligners SUSS MicroTec will work with GenISys to combine the SUSS MicroTec mask aligner tools with the GenISys simulation software Layout LAB.
Picosun achieves record ALD particle levels at Fraunhofer Picosun Oy announced record particle levels -- 1-2 added particles (>70nm) per wafer -- with its PICOSUN P-300B ALD batch tool installed at Fraunhofer IPMS.
AMAT selects Praxair gas system for ion implant tools The UpTime sub-atmospheric dopant gas delivery system from Praxair Electronics will be Applied Materials' factory default standard for the Varian VIISta ion implant platform.
ISMI convenes 200mm fab tool obsolescence forum Tool obsolescence is increasingly critical to chip makers running 200mm lines, reports ISMI, which chartered an Equipment Obsolescence Forum for alternative sourcing.

More Headlines:
• UPDATE: TEL joins CEA-Leti's lithography program IMAGINE
• AIXTRON depo tools installed for graphene research
• PVD handbook updated with cost and performance focus
• Chip substrate factory begins ops in Russia

Tech and research news
1 atom, 1 transistor: Researchers reach Moore’s limit A team of researchers at the University of New South Wales, Purdue University and the University of Melbourne built the smallest transistor -- using a single phosphorous atom.
Tabula taps Intel 22nm 3D trigate transistors for 3PLD Tabula is implementing a family of 3PLD products manufactured by Intel using its advanced 22nm 3D trigate process and co-optimized packaging technology.
NIST reveals how layered memory switches work New information from NIST about how layered switching devices for novel computer memory systems work may now allow these structures to come to market sooner.
MIT develops nanowire growth control method MIT researchers used gases to precisely control nanowires' width and composition as they grow, which could yield complex structures optimally designed for LEDs or PV.

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News Editor
Shannon Davis
603-891-9145
shannond@pennwell.com

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