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SST Global: Asia Pacific

   :: December 15, 2005    





:: SST Global: Asia Pacific

Welcome to the December 2005 edition of SST Global: Asia-Pacific, a monthly e-newsletter from the editors of Solid State Technology, Microlithography World, and WaferNews. This month’s issue is a comprehensive but concise collection of articles that can help our readers in the Asia-Pacific region stay on top of the latest technology developments and industry news about semiconductor manufacturing.



:: Semiconductor suppliers turn to DFM at nanometer nodes
Design decisions made early in IC development can either complicate or alleviate a growing number of manufacturing challenges in advanced process technologies as feature sizes shrink well below 130nm. Mark Miller, Pankaj Mayor, Cadence Design Systems Inc.; Walter Ng, Chartered Semiconductor Manufacturing Ltd.
Solid State Technology
, December 2005
::  Click for Full Story  ::

:: Using AFM to enhance MOCVD-grown OE devices
Metal-organic chemical-vapor deposition (MOCVD) has steadily progressed from small-scale materials research to a mass production technology, enabling such complex optoelectronic (OE) devices as laser diodes and ultrahigh-brightness light-emitting diodes (UHB-LED). Doru I. Florescu, Veeco Instruments Inc.
Solid State Technology
, December 2005
::  Click for Full Story  ::

:: Consumer economics drive FPD manufacturing strategies
The challenge in discussing flat-panel displays (FPDs) is that they are both a technology and an application. Michael Ciesinski, US Display Consortium
Solid State Technology
, November 2005
::  Click for Full Story  ::


:: Controlling porous low-k damage with decoupled plasma etching
One of the key challenges in backend integration is damage to the low-k dielectric during etch/ash processes. L. Chen, H. Kambara, Tokyo Electron America; M. Hagihara, Tokyo Electron Massachusetts LLC; Akira Koshiishi, Tokyo Electron AT Ltd.
Solid State Technology
, November 2005
::  Click for Full Story  ::

:: Fab managers discuss managing nanometer complexity at ISMI
Last month's ISMI Symposium on Manufacturing Effectiveness in Austin, TX, provided insights into the near future of high-volume semiconductor manufacturing. With fabs ramping 90nm and 65nm node processes, new mindsets and techniques are needed to manage the inherent complexity of manufacturing nanometer-scale IC structures. Ed Korczynski, Senior Technical Editor
WaferNews
, November 14, 2005
::  Click for Full Story  ::


:: Fledgling nanotech firms struggle through "Valley of Death"
Opportunities may be limitless for the future of nanotechnology-based products, but for hundreds of startups, reaching success will mean a lengthy struggle through what is being called the "Valley of Death." Bob Haavind, Editorial Director
WaferNews
, November 14, 2005
::  Click for Full Story  ::

:: Japan news: Optimistic again, supply sector ups projections, adds capacity
With the economy looking up and some chipmakers talking about ramping production, Japan's semiconductor supply chain is suddenly looking downright optimistic as well. Paula Doe, Contributing Editor
WaferNews
, November 7, 2005
::  Click for Full Story  ::

:: Defectivity in water immersion lithography
The origin, nature, and impact of defects intrinsic to water immersion lithography are identified, along with mitigation strategies for controlling them. U. Okoroanyanwu, J. Kye, Advanced Micro Devices; N. Yamamoto, Spansion LLC; K. Cummings, ASML
Microlithography World
, November 2005
::  Click for Full Story  ::

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