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:: May 4, 2006 |
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:: SST Review
: Metrology
In this edition of SST Review, we focus on the latest developments in metrology. The following collection of articles from Solid State Technology and Microlithography World is a comprehensive review of recent research and process considerations for improving device performance through the use of advanced metrology. |
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:: Improving 300mm wafer yield using x-ray diffraction inspectionDigital x-ray diffraction inspection of bare and patterned 300mm wafers is challenging conventional semiconductor wafer inspection systems. Digital x-ray imaging for crystallographic defects has the potential to deliver substantial savings in a semiconductor manufacturing environment by identifying defects that may cause device failure or wafer breakage during ultra-fast annealing. Petra Feichtinger, Bede X-ray Metrology Solid State Technology, April 2006 :: Click for Full Story :: 
:: Measuring deep-trench structures with model-based IRAt the 90nm node and beyond, measuring the dimensions of deep trenches during fabrication is increasingly important for process control. Model-based infrared reflectometry provides a unique capability to measure subtle details of the trench shape that can affect device yield, such as top and bottom CD, neck depths, and recess depths. Michael Gostein, Peter A. Rosenthal, Alex Maznev, Philips AMS; Alexander Kasic, Peter Weidner, Infineon Technologies; Pierre-Yves Guittet, Inotera Memories Solid State Technology, March 2006 :: Click for Full Story :: 
:: Achieving statistical validity in CD-SEM imageryA new image processing technology being added to current-generation CD-SEMs allows CD measurements to be made from multiple features from the same SEM image. Process control and characterization achieves better statistical validity, enabled by an order-of-magnitude increase in the data collection rate. Benjamin D. Bunday, International SEMATECH Manufacturing Initiative (ISMI); John Allgair, ISMI, Freescale assignee; Ofer Adan, Aviram Tam, PDC Business Group, Applied Materials Solid State Technology, January 2006 :: Click for Full Story :: :: Shape goes critical for sub-100nm process control For features with high aspect ratios, 1D critical dimension measurements are inadequate. A new-generation CD scanning electron microscopy (CD-SEM) system uses critical shape metrology to extract shape information from the SEM signal. Johann Foucher, CEA-LETI; Ganesh Sundaram, Dmitry Gorelikov, Soluris Inc. Microlithography World, November 2005 :: Click for Full Story :: :: A 90nm wafer-level technique for thin-film stress monitoring Coherent gradient sensing (CGS) is an emerging thin-film stress metrology technique that provides a method to map wafer-level stress on both blanket and patterned films. Jianxing Li, Marvin Partin, Raymond Carey, Avi Fuerst, William Johannes, Mahalingam Sankararaman, Intel Corp. Solid State Technology, October 2005 :: Click for Full Story :: :: Compact EUV source for at-wavelength metrology A compact EUV source at 13.5nm based on the electron bombardment of a silicon target is presented. This stable and debris-free "EUV-tube" can play an important role in various "at-wavelength" metrology applications (e.g., EUV reflectometry of multilayer mirrors and masks, etc.). André Egbert, Stefan Becker, phoenix|EUV Systems + Services GmbH; Boris N. Chichkov, Ulf Hinze, Laser Zentrum Hannover e.V. Microlithography World Online, August 2005 :: Click for Full Story :: :: Resist blur and line-edge roughness Photoresist line-edge roughness (LER) is precisely what its name implies: The sidewalls or edges of resist features are rough, not smooth. At feature sizes <~100nm, this roughness makes a nontrivial contribution to CD variation and transistor leakage. Gregg M. Gallatin, Applied Math Solutions LLC Microlithography World, August 2005 :: Click for Full Story :: :: Line-edge roughness across the process window Line-edge roughness (LER) varies across the process window and can be correlated to multiple resist-profile variables to provide an improved metric for process setup and algorithmic profile characterization. Terrence E. Zavecz, TEA Systems Corp.; Paul Knutrud, Dmitry Gorelikov, Soluris Inc.; David Brzozowy, Marco Vieira, ARCH Chemicals Inc. Microlithography World, Online, February 2005 :: Click for Full Story ::
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